EFFICIENT 64-BIT VEDIC MULTIPLIER DESIGN FOR ENHANCED COMPUTATIONAL SPEED. International Journal of Advance Scientific Research, [S. l.], v. 4, n. 11, p. 6–10, 2024. DOI: 10.37547/. Disponível em: https://sciencebring.com/index.php/ijasr/article/view/815. Acesso em: 22 jun. 2025.